DocumentCode :
568582
Title :
A DFT Methodology for Repairing Embedded Memories of Large MPSoCs
Author :
Ganeshpure, Kunal ; Kundu, Sandip
Author_Institution :
Mentor Graphics Corp., Wilsonville, OR, USA
fYear :
2012
fDate :
19-21 Aug. 2012
Firstpage :
108
Lastpage :
113
Abstract :
Memory Built-In Self-Test (MBIST) is used to test large memories embedded in Multi-Processor System on Chip (MPSoC). With increase in memory size, memory repair becomes necessary to improve yield. Memory repair consists of complex offline analysis requiring (i) fault diagnosis and (ii) optimizing reconfiguration based on failure map and available spare resources. This paper presents an embedded repair scheme that uses resources within a MPSoC. The main challenge involves establishing integrity of such internal resources before they are used for repair. We propose a layered approach to testing that (i) tests local processor cache first and uses (ii) software based self-testing of limited processor functions using (iii) a small program loaded into a cache from tester, which then (iv) serves as a vehicle for memory repair. This repaired memory can store and run larger software-based self-test programs to test the remaining systems. Software simulation is used to demonstrate feasibility of the proposed DFT scheme and test methodology. The main advantages of this approach are (i) avoidance of memory testers that are typically necessary for memory repair, (ii) avoiding additional hardware to support repair by using existing resources and (iii) testing all components using a logic tester.
Keywords :
memory architecture; microprocessor chips; multiprocessing systems; system-on-chip; DFT methodology; MPSoC; available spare resource; complex offline analysis; embedded memory; embedded repair; failure map; fault diagnosis; limited processor function; local processor cache; logic tester; memory built-in self-test; memory repair; memory size; memory tester; multiprocessor system on chip; reconfiguration; software based self-test program; software based self-testing; software simulation; Built-in self-test; Computer aided manufacturing; Hardware; Maintenance engineering; Redundancy; Software;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI (ISVLSI), 2012 IEEE Computer Society Annual Symposium on
Conference_Location :
Amherst, MA
ISSN :
2159-3469
Print_ISBN :
978-1-4673-2234-8
Type :
conf
DOI :
10.1109/ISVLSI.2012.17
Filename :
6296457
Link To Document :
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