An Area-Efficient 96.5%-Peak-Efficiency Cross-Coupled Voltage Doubler With Minimum Supply of 0.8 V

An area-efficient cross-coupled voltage doubler (CCVD) with no reversion loss using first-level gate-control mechanism is presented. The proposed design does not require area-consuming resistors or extra power MOSFETs to prevent reversion currents. Through the first-level gate controls, the proposed CCVD is able to use internal nodes to drive the gates of the power MOSFETs without extra buffers, thus further reducing the silicon area and power consumption. The proposed design has been fabricated in a commercial 0.35-μm CMOS technology (V_THN ≈ 0.59 V, V_THP ≈ -0.72 V), with an active area of only 0.49 mm². Experimental results show that it can achieve a maximum of 96.5% power efficiency value under a supply voltage range of 0.8-1.6 V with a maximum loading current of 30 mA.