DocumentCode
573311
Title
A Parity Scheme to Enhance Reliability for SSDs
Author
Qin, Yi ; Feng, Dan ; Liu, Jingning ; Tong, Wei ; Hu, Yang ; Zhu, Zhiming
Author_Institution
Wuhan Nat. Lab. for Optoelectron., Huazhong Univ. of Sci. & Technol., Wuhan, China
fYear
2012
fDate
28-30 June 2012
Firstpage
293
Lastpage
297
Abstract
Recent years, the application of solid-state disks (SSDs) increases explosively. All SSDs have to employ error correcting code (ECC) technique to ensure the reliability of flash memory at page level. However, data loss may be caused by bad block or chip failure of flash memory. To solve this problem, the article proposes a flash memory redundant array technique, which is similar to RAID-4. In this scheme, we utilize built-in NVRAM to cache the parity data update for minimal write to flash memory in parity channel.
Keywords
RAID; cache storage; error correction codes; flash memories; random-access storage; ECC technique; NVRAM; RAID-4; SSD; cache; chip failure; data loss; error correcting code; flash memory redundant array technique; page level; parity channel; parity data update; parity scheme; reliability; solid-state disk; Arrays; Ash; Error correction codes; Reliability; Strips; Time factors; SSD; flash array; parity scheme; reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
Networking, Architecture and Storage (NAS), 2012 IEEE 7th International Conference on
Conference_Location
Xiamen, Fujian
Print_ISBN
978-1-4673-1889-1
Type
conf
DOI
10.1109/NAS.2012.40
Filename
6310956
Link To Document