DocumentCode
575072
Title
Double stack passivation layer with effective lifetime for crypto-processor
Author
Lee, Young Sil ; Jang, Won Tae ; Lee, Hoon Jae
Author_Institution
Dept. of Ubiquitous IT, Dongseo Univ., Busan, South Korea
fYear
2011
fDate
Nov. 29 2011-Dec. 1 2011
Firstpage
707
Lastpage
710
Abstract
In this paper, we propose a double stack layer which double stack layers by SiO2/SiNx passivate on the wafer. The proposed passivation layer is deposited SiN1 by PECVD on the wafer and then deposited silicon oxide (SiO2) b RTP. Finally, form the final metal layer using silicon nitride by PECVD. Our propose passivation layer can provide effective lifetime then conventional passivation layer by SiNx/SiO2 double stack layer and can provide robust passivation layer through metal layer on the top of chip.
Keywords
cryptography; microprocessor chips; passivation; PECVD; SiO2-SiN; crypto-processor; deposited silicon oxide; double stack passivation layer; effective lifetime; silicon nitride;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Sciences and Convergence Information Technology (ICCIT), 2011 6th International Conference on
Conference_Location
Seogwipo
Print_ISBN
978-1-4577-0472-7
Type
conf
Filename
6316708
Link To Document