• DocumentCode
    57544
  • Title

    Eliminating Timing Information Flows in a Mix-Trusted System-on-Chip

  • Author

    Oberg, J. ; Sherwood, T. ; Kastner, R.

  • Author_Institution
    Comput. Sci. & Eng. Dept., Univ. of California, San Diego, La Jolla, CA, USA
  • Volume
    30
  • Issue
    2
  • fYear
    2013
  • fDate
    Apr-13
  • Firstpage
    55
  • Lastpage
    62
  • Abstract
    Editor´s notes: Integration of untrusted third-party IPs into an SoC design is a major challenge in establishing trustworthiness of the entire SoC. This article presents an approach to ensure information flow isolation between trusted and untrusted IP cores.
  • Keywords
    industrial property; safety; system-on-chip; SoC design; SoC trustworthiness; information flow isolation; intellectual property; mix trusted system on chip; third party IP; timing information flow; untrusted IP cores; Hardware; Hardware design languages; Logic gates; System-on-a-chip; Timing; Trojan horses;
  • fLanguage
    English
  • Journal_Title
    Design & Test, IEEE
  • Publisher
    ieee
  • ISSN
    2168-2356
  • Type

    jour

  • DOI
    10.1109/MDT.2013.2247457
  • Filename
    6461920