DocumentCode :
57842
Title :
PLC Performance Analysis Assuming BPSK Modulation Over Nakagami- 
Additive Noise
Author :
Mathur, Abhisek ; Bhatnagar, M.R.
Author_Institution :
Dept. of Electr. Eng., Indian Inst. of Technol.-Delhi, New Delhi, India
Volume :
18
Issue :
6
fYear :
2014
fDate :
Jun-14
Firstpage :
909
Lastpage :
912
Abstract :
In this letter, we derive a maximum likelihood receiver of binary phase shift keying signals over Nakagami-m distributed additive noise in power line communication system. The decision variable is characterized by using copula approach. The analytical average bit error rate of the considered scheme is numerically evaluated by using the cumulative distribution function of the decision variable. It is shown by simulations that the proposed receiver performs significantly better than an existing suboptimal receiver.
Keywords :
Nakagami channels; carrier transmission on power lines; error statistics; interference (signal); phase shift keying; statistical distributions; BPSK Modulation; Nakagami-m distributed additive noise; PLC performance analysis; average bit error rate; binary phase shift keying signal receiver; copula approach; cumulative distribution function; decision variable; power line communication system; suboptimal receiver; Binary phase shift keying; Bit error rate; Computational modeling; Detectors; Noise; Noise measurement; Receivers; Background noise; Nakagami-$m$ distribution; bit error rate (BER); comonotonicity; copula; power-line communications;
fLanguage :
English
Journal_Title :
Communications Letters, IEEE
Publisher :
ieee
ISSN :
1089-7798
Type :
jour
DOI :
10.1109/LCOMM.2014.2314673
Filename :
6781599
Link To Document :
