Development of simulation environment for controllers based on FPGA

Available simulators for testing Hardware Descriptive Language (HDL) codes provide output with respect to simulator clock. This output is not sufficient for the analysis of Field Programmable Gate Array (FPGA) based embedded controllers. The embedded controllers give actuation signal to the plant and receives plant output as the feedback signal. Therefore a coupling between embedded and plant simulators needs to be created. This paper proposes a novel interface between simulator for embedded controller with that for plant. This interface also provides output waveforms as a function of time and enables to compare with that of desired output. The proposed interface provides a complete simulation environment for FPGA based embedded controllers. This environment can be used for analyzing the performance of embedded controllers. This environment also helps in choosing appropriate word length with permissible error. The output of analysis on varying word-length is also presented in this paper.