DocumentCode :
579751
Title :
Beyond CPU Frequency Scaling for a Fine-grained Energy Control of HPC Systems
Author :
Chetsa, Ghislain Landry Tsafack ; Lefevre, Laurent ; Pierson, Jean-Marc ; Stolf, Patricia ; Costa, Georges Da
Author_Institution :
LIP Lab., Univ. de Lyon, Lyon, France
fYear :
2012
fDate :
24-26 Oct. 2012
Firstpage :
132
Lastpage :
138
Abstract :
Modern high performance computing subsystems (HPC) - including processor, network, memory, and IO - are provided with power management mechanisms. These include dynamic speed scaling and dynamic resource sleeping. Understanding the behavioral patterns of high performance computing systems at runtime can lead to a multitude of optimization opportunities including controlling and limiting their energy usage. In this paper, we present a general purpose methodology for optimizing energy performance of HPC systems considering processor, disk and network. We rely on the concept of execution vector along with a partial phase recognition technique for on-the-fly dynamic management without any a priori knowledge of the workload. We demonstrate the effectiveness of our management policy under two real-life workloads. Experimental results show that our management policy in comparison with baseline unmanaged execution saves up to 24% of energy with less than 4% performance overhead for our real-life workloads.
Keywords :
multiprocessing systems; parallel processing; power aware computing; power control; resource allocation; CPU frequency scaling; HPC system; behavioral pattern; disk; dynamic resource sleeping; dynamic speed scaling; energy performance optimization; energy usage control; energy usage limitation; execution vector; fine-grained energy control; high performance computing system; management policy; memory; network; on-the-fly dynamic management; optimization opportunity; partial phase recognition technique; performance overhead; power management mechanism; processor; Energy consumption; Hardware; Radiation detectors; Runtime; Sensor phenomena and characterization; Vectors; energy optimization; hardware performance counters; phase identification; system adaptation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture and High Performance Computing (SBAC-PAD), 2012 IEEE 24th International Symposium on
Conference_Location :
New York, NY
ISSN :
1550-6533
Print_ISBN :
978-1-4673-4790-7
Type :
conf
DOI :
10.1109/SBAC-PAD.2012.32
Filename :
6374781
Link To Document :
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