DocumentCode
580117
Title
Instruction-level simulation of a cluster at scale
Author
Leon, Edgar A. ; Riesen, R. ; Maccabe, A.B. ; Bridges, Patrick G.
fYear
2009
fDate
14-20 Nov. 2009
Firstpage
1
Lastpage
12
Abstract
Instruction-level simulation is necessary to evaluate new architectures. However, single-node simulation cannot predict the behavior of a parallel application on a supercomputer. We present a scalable simulator that couples a cycle-accurate node simulator with a supercomputer network model. Our simulator executes individual instances of IBM´s Mambo PowerPC simulator on hundreds of cores. We integrated a NIC emulator into Mambo and model the network instead of fully simulating it. This decouples the individual node simulators and makes our design scalable. Our simulator runs unmodified parallel message-passing applications on hundreds of nodes. We can change network and detailed node parameters, inject network traffic directly into caches, and use different policies to decide when that is an advantage. This paper describes our simulator in detail, evaluates it, and demonstrates its scalability. We show its suitability for architecture research by evaluating the impact of cache injection on parallel application performance.
Keywords
message passing; parallel architectures; Mambo PowerPC simulator; NIC emulator; cache injection; cycle-accurate node simulator; instruction-level simulation; network traffic; parallel application; parallel message-passing; scalable simulator; supercomputer network model;
fLanguage
English
Publisher
ieee
Conference_Titel
High Performance Computing Networking, Storage and Analysis, Proceedings of the Conference on
Conference_Location
Portland, OR
Type
conf
DOI
10.1145/1654059.1654063
Filename
6375566
Link To Document