DocumentCode :
580220
Title :
Tiny application-specific programmable processor for BCH decoding
Author :
Van Herrewege, Anthony ; Verbauwhede, Ingrid
Author_Institution :
ESAT/COSIC, KU Leuven, Leuven, Belgium
fYear :
2012
fDate :
10-12 Oct. 2012
Firstpage :
1
Lastpage :
4
Abstract :
We present a novel design for a tiny application-specific programmable processor for BCH decoding. The design is optimized for use in a PUF key extractor, where low-area overhead is extremely important. Due to it´s flexible nature, it can support a wide range of BCH codes. The complete design for a BCH(413, 296, 13) decoder requires only 1% (less than 70 slices) of the available resources of a small FPGA.
Keywords :
BCH codes; application specific integrated circuits; decoding; field programmable gate arrays; microprocessor chips; BCH code; BCH decoding; FPGA; PUF key extractor; application-specific programmable processor; design optimisation; Algorithm design and analysis; Computer architecture; Decoding; Field programmable gate arrays; Polynomials; Random access memory; Runtime; BCH decoding; FPGA design; PUF key extraction; processor design;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System on Chip (SoC), 2012 International Symposium on
Conference_Location :
Tampere
Print_ISBN :
978-1-4673-2895-1
Electronic_ISBN :
978-1-4673-2894-4
Type :
conf
DOI :
10.1109/ISSoC.2012.6376358
Filename :
6376358
Link To Document :
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