DocumentCode
580489
Title
Middleware based executive for embedded reconfigurable platforms
Author
Khiar, A. ; Knecht, N. ; Gantel, L. ; Lkad, S. ; Miramond, B.
Author_Institution
ETIS Lab., Univ. of Cergy-Pontoise, Cergy-Pontoise, France
fYear
2012
fDate
23-25 Oct. 2012
Firstpage
1
Lastpage
6
Abstract
This paper presents a method to virtualize the communications into a distributed heterogeneous embedded Multiprocessor System-on-Chip (MPSoC) platform containing reconfigurable hardware computing units. We propose a new concept of middleware, implemented in software and in hardware to provide the designer a single programming interface. The middleware offers some mechanisms like access to distant operating system (OS) services and interprocess communication. It abstracts both implementation and mapping. The embedded application then executes regardless of where or how processes are implemented. We are currently validating the concept on a real-time image processing application.
Keywords
embedded systems; image processing; microprocessor chips; middleware; operating systems (computers); system-on-chip; user interfaces; MPSoC platform; OS services; distant operating system services; distributed heterogeneous embedded multiprocessor system-on-chip; embedded reconfigurable platforms; interprocess communication; middleware based executive; realtime image processing application; reconfigurable hardware computing units; single programming interface; Computer architecture; Hardware; Middleware; Operating systems; Programming; Target tracking; FPGA; Middleware; Partial and dynamic reconfiguration; RTOS; virtualization;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Architectures for Signal and Image Processing (DASIP), 2012 Conference on
Conference_Location
Karlsruhe
Print_ISBN
978-1-4673-2089-4
Electronic_ISBN
978-2-9539987-4-0
Type
conf
Filename
6385359
Link To Document