DocumentCode
581009
Title
Fine-grained hardware/software methodology for process migration in MPSoCs
Author
Li, Tuo ; Ambrose, Jude Angelo ; Parameswaran, Sri
Author_Institution
Sch. of Comput. Sci. & Eng., Univ. of New South Wales, Sydney, NSW, Australia
fYear
2012
fDate
5-8 Nov. 2012
Firstpage
508
Lastpage
515
Abstract
Process migration (PM) is a method used in Multi-Processor System on Chips (MPSoCs) to improve reliability, reduce thermal hotspots and balance loads. However, existing PM approaches are limited by coarse granularity (i.e. can only switch at application or operating systems boundaries), and thus respond slowly. Such slow response does not allow for fine control over temperature, nor does it allow frequent migration which is necessary in certain systems. In this paper, we propose Thor, an approach which is a fine-grained reliable PM scheme, for Embedded MPSoCs, to overcome the limitations of existing PM approaches. Our approach leverages custom instructions to integrate a base processor architecture, with PM functionality. We have proposed three schemes, Thor-BM (migration at basic block boundaries), Thor-BM/CR (migration at basic block boundaries with checkpoint and recovery), and ThorIM/CR (migration at instruction level with checkpoint and recovery). Our experiments show that the execution time overhead is less than 2%, while the additional area cost and power consumption costs are approximately 50% (excluding main memories, which if taken into account would substantially decrease this overhead). The average migration time cost is 289 cycles.
Keywords
checkpointing; embedded systems; hardware-software codesign; instruction sets; multiprocessing systems; operating systems (computers); resource allocation; system-on-chip; ASIP; Thor-BM/CR; ThorIM/CR; application specific instruction set processors; base processor architecture; basic block boundary; checkpoint; coarse granularity; embedded MPSoC; execution time overhead; fine-grained hardware-software methodology; instruction level; load balancing; multiprocessor system on chip; operating system boundary; power consumption cost; process migration; recovery; reliability; thermal hotspot reduction; Computer architecture; Educational institutions; Ground penetrating radar; Indexes; Integrated circuits; Registers; Reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design (ICCAD), 2012 IEEE/ACM International Conference on
Conference_Location
San Jose, CA
ISSN
1092-3152
Type
conf
Filename
6386717
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