Implementing high-performance, low-power embedded processors: Challenges and solutions: Designer track

High-speed micro-processors are key elements in communication system-on-chip (SOC) products. The design of these processors is challenging because of the extreme performance, low power and low cost that is required for a competitive state-of-the-art implementation. In this presentation, we will give an overview of the engineering techniques and design methodologies that are used to produce world-class embedded application processors with very fast design turn-around times. We will identify the main challenges that designers face when trying to achieve the highest possible performance within a given power envelope. The new issues posed by state-of-the-art embedded cores in nanometer process nodes will be discussed and opportunities for innovative electronic design automation (EDA) solutions will be highlighted.