DocumentCode
581486
Title
A zero-sequence component injected PWM method with reduced switching losses and suppressed common-mode voltage for a three-phase four-leg voltage source inverter
Author
Zhang, Min ; Atkinson, David ; Armstrong, Matthew
Author_Institution
Sch. of Electr. & Electron. Eng., Newcastle Univ., Newcastle upon Tyne, UK
fYear
2012
fDate
25-28 Oct. 2012
Firstpage
5068
Lastpage
5073
Abstract
A new switching scheme, which combines conventional space vector modulation (SVM) and carrier-based pulse width modulation (CBPWM), is proposed for a three-phase four-leg voltage source inverter (VSI). The proposed algorithm is simpler than conventional three-dimensional space vector modulation (3-D SVM) and easy in implementation in a real-time DSP system, it avoids the selection of a prism and tetrahedron in a 3-D SVM, therefore alleviates the computation burden of the DSP. Also, the concept of near-state pulse width modulation (NSPWM) method, which is used in a three-phase three-leg inverter to reduce the common mode voltage (CMV) noises, can be adopted in this algorithm so as to reduce the common mode voltage for a three-phase four-leg VSI. The feasibility of the proposed modulation technique is verified by both computer simulation and experimental results.
Keywords
PWM invertors; digital signal processing chips; losses; 3D SVM; CBPWM; CMV noise; DSP system; NSPWM method; VSI; carrier-based pulse width modulation; common mode voltage noise; common-mode voltage suppression; injected PWM method; near-state pulse width modulation method; switching loss reduction; three-dimensional space vector modulation; three-phase four-leg voltage source inverter; zero-sequence component; Support vector machines;
fLanguage
English
Publisher
ieee
Conference_Titel
IECON 2012 - 38th Annual Conference on IEEE Industrial Electronics Society
Conference_Location
Montreal, QC
ISSN
1553-572X
Print_ISBN
978-1-4673-2419-9
Electronic_ISBN
1553-572X
Type
conf
DOI
10.1109/IECON.2012.6389561
Filename
6389561
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