Title :
SleepWalker: A 25-MHz 0.4-V Sub-
7-
Microcontroller in 65-
Author :
Bol, David ; De Vos, J. ; Hocquet, Cedric ; Botman, Francois ; Durvaux, Francois ; Boyd, Stephen ; Flandre, Denis ; Legat, Jean-Didier
Author_Institution :
ICTEAM Inst., Univ. Catholique de Louvain (UCL), Louvain-la-Neuve, Belgium
Abstract :
Integrated circuits for wireless sensor nodes (WSNs) targeting the Internet-of-Things (IoT) paradigm require ultralow-power consumption for energy-harvesting operation and low die area for low-cost nodes. As the IoT calls for the deployment of trillions of WSNs, minimizing the carbon footprint for WSN chip manufacturing further emerges as a third target in a design-for-the-environment (DfE) perspective. The SleepWalker microcontroller is a 65-nm ultralow-voltage SoC based on the MSP430 architecture capable of delivering increased speed performances at 25 MHz for only 7 μW/MHz at 0.4 V. Its sub-mm2 die area with low external component requirement ensures a low carbon footprint for chip manufacturing. SleepWalker incorporates an on-chip adaptive voltage scaling (AVS) system with DC/DC converter, clock generator, memories, sensor and communication interfaces, making it suited for WSN applications. An LP/GP process mix is fully exploited for minimizing the energy per cycle, with power gating to keep stand-by power at 1.7 μW. By incorporating a glitch-masking instruction cache, system power can be reduced by up to 52%. The AVS system ensures proper 25-MHz operation over process and temperature variations from -40 °C to +85 °C, with a peak efficiency of the DC/DC converter above 80%. Finally, a multi-Vt clock tree reduces variability-induced clock skew by 3 × to ensure robust timing closure down to 0.3 V.
Keywords :
CMOS integrated circuits; DC-DC power convertors; Internet of Things; carbon; computerised instrumentation; microcontrollers; wireless sensor networks; AVS system; DC-DC converter; DfE perspective; Internet-of-Things paradigm; IoT paradigm; LP-GP CMOS; MSP430 architecture; SleepWalker microcontroller; WSN chip manufacturing; adaptive voltage scaling system; clock generator; communication interfaces; design-for-the-environment perspective; energy-harvesting operation; frequency 25 MHz; integrated circuits; low-carbon wireless sensor nodes; low-cost nodes; power 1.7 muW; power 7 muW; size 65 nm; temperature 40 degC to 85 degC; ultralow-power consumption; ultralow-voltage SoC; voltage 0.4 V; Clocks; DC-DC power converters; Delay; Logic gates; System-on-a-chip; Wireless sensor networks; CMOS digital integrated circuits; design for the environment (DfE); near-threshold/subthreshold logic; system-on-chip (SoC); ultralow power; ultralow voltage; variability mitigation;
Journal_Title :
Solid-State Circuits, IEEE Journal of
DOI :
10.1109/JSSC.2012.2218067