• DocumentCode
    583005
  • Title

    CPB-ARM -- A New Code Compression Method for Embedded Systems

  • Author

    Dias, Wanderson Roger Azevedo ; Moreno, Edward David

  • Author_Institution
    Dept. de Cienc. da Comput. - DCC, Univ. Fed. do Amazonas - UFAM, Manaus, Brazil
  • fYear
    2012
  • fDate
    17-19 Oct. 2012
  • Firstpage
    25
  • Lastpage
    32
  • Abstract
    In the design of embedded systems, memory is one of the most restricted resources. The code compression has been proposed as a solution to reduce the code size of applications that run on embedded systems. However, one major challenge is to develop an efficient compression technique that generates a substantial reduction in code size without affecting the overall system performance. We have observed that most previous work compresses only instruction individually. Therefore, this paper proposes a new code compression method (CPB-ARM) which comprises four different types of compression techniques, and each of these techniques form different patterns of blocks taking into account the class and the format of each instruction. The simulation results showed that our method, which uses only 18 instructions, the most frequently used by the application, obtained a compression ratio of approximately 24% for twenty MiBench applications.
  • Keywords
    data compression; embedded systems; CPB-ARM; MiBench applications; code compression method; compression ratio; embedded systems; Benchmark testing; Data processing; Embedded systems; Hardware; Indexes; Reduced instruction set computing; ARM; code compression; embedded processor; embedded systems; patterns blocks;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer Systems (WSCAD-SSC), 2012 13th Symposium on
  • Conference_Location
    Petropolis
  • Print_ISBN
    978-1-4673-4468-5
  • Type

    conf

  • DOI
    10.1109/WSCAD-SSC.2012.20
  • Filename
    6391760