Title :
An Optimization Problem for Topological Quantum Computation
Author :
Yamashita, Shigeru
Author_Institution :
Coll. of Inf. Sci. & Eng., Ritsumeikan Univ. Shiga, Kusatsu, Japan
Abstract :
This paper formulates the logic level circuit optimization problem for topological quantum computation. Observing the properties of brading operations in topological quantum computation, we formulate our problem as to find a good gate order and a good initial qubit order. For the problem, we propose an efficient method by utilizing an algorithm for clique finding. Our experimental result shows the effectiveness of our proposed method.
Keywords :
circuit optimisation; logic circuits; network topology; quantum computing; brading operations; logic level circuit optimization problem; qubit order; topological quantum computation; Circuit optimization; Circuit synthesis; Computational modeling; Integrated circuit modeling; Logic gates; Quantum computing; optimization problem; quantum circuit; qubit order; topological quantum computation;
Conference_Titel :
Test Symposium (ATS), 2012 IEEE 21st Asian
Conference_Location :
Niigata
Print_ISBN :
978-1-4673-4555-2
Electronic_ISBN :
1081-7735
DOI :
10.1109/ATS.2012.45
