A Millimeter-Wave In-Phase Gate-Boosting Rectifier

This paper introduces a new class of RF-to-dc rectifiers called the in-phase gate-boosting rectifier (IGR). An IGR utilizes an in-phase passive voltage multiplier (IPVM) to boost in-phase VGS swing from the driving VDS swing. This design simultaneously reduces the effective threshold voltage, forward resistance, and the reverse leakage current of the rectifying transistor. As a consequence, the sensitivity and the efficiency of a high-frequency rectifier can be improved. Furthermore, a CG-loaded IPVM presents low input conductance and is shunted with the drains/sources of the rectifying transistors. This makes the realization of the input matching network between the IGR core and the antenna easier, and achieves a higher voltage swing at the input terminals of the IGR core. The criteria, properties, and relating proofs of the IPVM are also discussed. A differential seven-stage millimeter-wave IGR is implemented in a 65-nm RF CMOS process. In this design, an interleaving internal threshold cancellation bias scheme is also introduced to further suppress the power consumption due to biasing circuitry without increasing the layout area. The implemented integrated circuit achieves a state-of-the-art -7-dBm sensitivity with 20% peak efficiency at 53 GHz and a bandwidth of 10 GHz from 46 to 56 GHz.