Modelling of symmetrical distributed clock RC H-tree

This paper presents a global behavioral model of a symmetrical distributed clock H-tree network. Very accurate analytical calculation method of the reduced model transfer function is derived from the mathematical analysis based on the matrix transfer. This method allows the extraction of signal integrity parameters as a function of the distributed H-tree characteristics. In order to demonstrate the accuracy of theoretical expressions, SPICE computations with various levels of RC-tree networks were performed. Tree networks with {2, 4, 5, 7}-levels formed by TLs were experimented numerically. Excellent agreement between the simulations and the results from the proposed models has been observed both in frequency-and time-domains. Signal attenuation as a function of the clock tree level was investigated. Application of the method to a microstrip H-tree interconnect by using the RLC-model (taking into account the inductive effect) is also proposed and validated with standard commercial simulation tool.