Title :
Hardware implementation of PAPR reduction scheme for OFDM system
Author :
Kamdar, Bhavin ; Shah, Dhaval ; Sorathia, Shahid ; Rao, Y.S.
Author_Institution :
Electron. & Telecommun. Dept., Univ. of Mumbai, Mumbai, India
Abstract :
High Peak to Average Power Ratio (PAPR) is one of the major challenges of any Orthogonal Frequency Division Multiplexing (OFDM) system. Many methods have been suggested for reducing PAPR. In this paper we design and implement an OFDM system on a FPGA along with PAPR reduction using Selected Mapping (SLM) technique. We analyse challenges in practical implementation of the system and also investigate the resource utilization increase as compared to a normal OFDM system.
Keywords :
OFDM modulation; field programmable gate arrays; FPGA; OFDM system; PAPR reduction scheme; SLM technique; hardware implementation; orthogonal frequency division multiplexing system; peak-to-average power ratio; selected mapping technique; Field programmable gate arrays; Modulation; Peak to average power ratio; Receivers; Resource management; Transmitters; FPGA; OFDM; Peak to Average Power Ratio; Selected Mapping (SLM);
Conference_Titel :
Communication, Information & Computing Technology (ICCICT), 2012 International Conference on
Conference_Location :
Mumbai
Print_ISBN :
978-1-4577-2077-2
DOI :
10.1109/ICCICT.2012.6398132
