• DocumentCode
    585799
  • Title

    A 1.7GS/s 6-bit Flash A/D converter with distributed offset cancelling sample-and-hold

  • Author

    Mountrichas, L. ; Laopoulos, Th ; Siskos, S.

  • Author_Institution
    Phys. Dept., Aristotle Univ. of Thessaloniki, Thessaloniki, Greece
  • fYear
    2012
  • fDate
    12-14 Sept. 2012
  • Firstpage
    51
  • Lastpage
    56
  • Abstract
    A High-Speed Analog-to-Digital Converter was implemented utilizing a novel distributed sample-and-hold, output offset storage comparator. The number of storage capacitors is minimized by use of one offset cancellation stage per two amplifiers, a technique used for the first time, in our knowledge.
  • Keywords
    amplifiers; analogue-digital conversion; comparators (circuits); sample and hold circuits; amplifier; distributed offset cancelling sample-and-hold; flash analog-digital converter; high-speed analog-to-digital converter; offset cancellation; output offset storage comparator; Capacitors; Clocks; Delay; Layout; Preamplifiers; Synchronization; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOC Conference (SOCC), 2012 IEEE International
  • Conference_Location
    Niagara Falls, NY
  • ISSN
    2164-1676
  • Print_ISBN
    978-1-4673-1294-3
  • Type

    conf

  • DOI
    10.1109/SOCC.2012.6398379
  • Filename
    6398379
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=585799