Title :
A 1.7GS/s 6-bit Flash A/D converter with distributed offset cancelling sample-and-hold
Author :
Mountrichas, L. ; Laopoulos, Th ; Siskos, S.
Author_Institution :
Phys. Dept., Aristotle Univ. of Thessaloniki, Thessaloniki, Greece
Abstract :
A High-Speed Analog-to-Digital Converter was implemented utilizing a novel distributed sample-and-hold, output offset storage comparator. The number of storage capacitors is minimized by use of one offset cancellation stage per two amplifiers, a technique used for the first time, in our knowledge.
Keywords :
amplifiers; analogue-digital conversion; comparators (circuits); sample and hold circuits; amplifier; distributed offset cancelling sample-and-hold; flash analog-digital converter; high-speed analog-to-digital converter; offset cancellation; output offset storage comparator; Capacitors; Clocks; Delay; Layout; Preamplifiers; Synchronization; Transistors;
Conference_Titel :
SOC Conference (SOCC), 2012 IEEE International
Conference_Location :
Niagara Falls, NY
Print_ISBN :
978-1-4673-1294-3
DOI :
10.1109/SOCC.2012.6398379
