DocumentCode
585805
Title
Efficient high-speed current-mode links for network-on-chip performance optimization
Author
Kia, Hamed S. ; Ababei, Cristinel
Author_Institution
Dept. of Electr. & Comput. Eng., North Dakota State Univ., Fargo, ND, USA
fYear
2012
fDate
12-14 Sept. 2012
Firstpage
153
Lastpage
158
Abstract
We propose a novel cost-effective long-range NoC interconnect design based on current-mode signaling. The proposed CMOS based long-range link reduces the communication delay of long wires significantly without using traditional pipelined repeaters, making it a cost efficient alternative to wireless and optical interconnects. Spice simulations are performed to verify the performance of the proposed current-mode transceiver. The performance of the proposed interconnect is analyzed and compared with wireless, optical and existing CMOS based interconnects. Also a modified NoC simulator is utilized to demonstrate the benefit of current-mode long-range links.
Keywords
CMOS integrated circuits; SPICE; current-mode circuits; integrated circuit design; network-on-chip; CMOS based long-range link; NoC interconnect design; NoC simulator; SPICE simulation; communication delay reduction; current-mode link; current-mode long-range link; current-mode signaling; current-mode transceiver; network-on-chip performance optimization; CMOS integrated circuits; Delay; Integrated circuit interconnections; Optical interconnections; Transceivers; Wireless communication; Wires;
fLanguage
English
Publisher
ieee
Conference_Titel
SOC Conference (SOCC), 2012 IEEE International
Conference_Location
Niagara Falls, NY
ISSN
2164-1676
Print_ISBN
978-1-4673-1294-3
Type
conf
DOI
10.1109/SOCC.2012.6398387
Filename
6398387
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