DocumentCode :
586890
Title :
An ultra-fast 65nm capacitorless LDO regulator dedicated for sensory detection using a direct feedback dual self-reacting loop technique
Author :
Chiang-Liang Kok ; Siek, Liter ; Wei Meng Lim
Author_Institution :
VIRTUS - IC Design Centre of Excellence, Nanyang Technol. Univ., Singapore, Singapore
fYear :
2012
fDate :
21-23 Nov. 2012
Firstpage :
31
Lastpage :
33
Abstract :
This article presents an ultra-fast 65nm LDO regulator dedicated for sensory detection using a direct feedback dual self reacting loop technique. This novel technique enabled the regulator to achieve a very fast response time of 0.10μs for a maximum load current transition from 1 to 50mA. Furthermore, it achieves a very low quiescent current of 5.0μA coupled with a low power consumption of 5.0μW. This LDO regulator, simulated with Global Foundries 65nm CMOS process, yields a stable output voltage of 0.8V with a supply voltage ranging from 1-1.4V. Its distinct features, ultra-fast response time and very low power consumption, make it ideally suitable for sensory detection.
Keywords :
CMOS integrated circuits; circuit feedback; voltage regulators; current 5.0 muA; direct feedback dual self-reacting loop technique; global foundries CMOS process; low power consumption; power 5.0 muW; sensory detection; size 65 nm; time 0.10 mus; ultrafast capacitorless LDO regulator; voltage 0.8 V; voltage 1 V to 1.4 V; Logic gates; Power demand; Regulators; System-on-a-chip; Time factors; Transient response; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio-Frequency Integration Technology (RFIT), 2012 IEEE International Symposium on
Conference_Location :
Singapore
Print_ISBN :
978-1-4673-2303-1
Type :
conf
DOI :
10.1109/RFIT.2012.6401604
Filename :
6401604
Link To Document :
بازگشت