DocumentCode :
58743
Title :
High Holding Voltage SCR-LDMOS Stacking Structure With Ring-Resistance-Triggered Technique
Author :
Fei Ma ; Bin Zhang ; Yan Han ; Jianfeng Zheng ; Bo Song ; Shurong Dong ; Hailian Liang
Author_Institution :
Dept. of Inf. Sci. & Electron. Eng., Zhejiang Univ., Hangzhou, China
Volume :
34
Issue :
9
fYear :
2013
fDate :
Sept. 2013
Firstpage :
1178
Lastpage :
1180
Abstract :
A novel ring-resistance-triggered stacked SCR-laterally diffused MOSs has been successfully verified in a 0.35 μm, 30-V/5-V bipolar CMOS DMOS process to solve the coupling of trigger voltage and holding voltage in stacking structures. The holding voltage of the proposed structure can be modulated by varying stacking numbers, and a high holding voltage of 22 V has been achieved using six stacks. On the other side, the trigger voltage almost keeps constant at ~ 53 V and a high failure current of 3.5 A has been achieved.
Keywords :
CMOS integrated circuits; MOSFET; bipolar integrated circuits; electrostatic discharge; rectifiers; SCR-LDMOS stacking structure; bipolar CMOS DMOS process; current 3.5 A; holding voltage; ring-resistance-triggered technique; size 0.35 micron; stacked SCR-laterally diffused MOS; trigger voltage; voltage 22 V; Electrostatic discharges; Resistors; Stacking; Structural rings; Thyristors; Transmission line measurements; Electrostatic discharge (ESD); SCR; holding voltage; latch-up immunity; laterally diffused metal-oxide-semiconductor (LDMOS);
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2013.2272591
Filename :
6568883
Link To Document :
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