DocumentCode :
58745
Title :
Novel Method for Fabrication of Tri-Gated Poly-Si Nanowire Field-Effect Transistors With Sublithographic Channel Dimensions
Author :
Ko-Hui Lee ; Horng-Chih Lin ; Tiao-Yuan Huang
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
Volume :
34
Issue :
6
fYear :
2013
fDate :
Jun-13
Firstpage :
720
Lastpage :
722
Abstract :
A high-performance short-channel tri-gated polycrystalline-silicon nanowire (NW) field-effect transistor is developed by using simple sidewall spacer and lateral etching techniques without employing costly lithographic tools. Channel length of 120 nm and NW thickness of 25 nm can be easily formed by the self-aligned process. The device exhibits superior electrical characteristics because of the strong gate controllability: a subthreshold swing of 102 mV/dec, drain induced barrier lowing of 74.4 mV/V, and extremely high ION/IOFF ratio of 4.4 ×108(Vd=1 V) are obtained.
Keywords :
elemental semiconductors; etching; field effect transistors; nanofabrication; nanolithography; nanowires; silicon; NW; Si; electrical characteristics; lateral etching technique; lithographic tool; self-aligned process; short-channel trigated polycrystalline-silicon nanowire field-effect transistor; sidewall spacer; size 120 nm; size 25 nm; strong gate controllability; sublithographic channel dimension; voltage 1 V; Nanowire; polycrystalline-silicon (poly-Si); self-aligned; short channel;
fLanguage :
English
Journal_Title :
Electron Device Letters, IEEE
Publisher :
ieee
ISSN :
0741-3106
Type :
jour
DOI :
10.1109/LED.2013.2256771
Filename :
6515595
Link To Document :
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