Simulation Study of the Single-Event Effects Sensitivity in Nanoscale CMOS for Body-Biasing Circuits

Author

Junrui Qin ; Shuming Chen ; Changguo Guo ; Yankang Du

Author_Institution

Sch. of Comput. Sci., Nat. Univ. of Defense Technol., Changsha, China

Volume

14

Issue

2

fYear

2014

fDate

Jun-14

Firstpage

639

Lastpage

644

Abstract

The sensitivity of single-event effects (SEEs) in nanoscale CMOS for body-biasing circuits has been investigated. For PMOS hits, it is found that forward-biasing the body for high-speed applications can suppress the SET pulses greatly. Reverse-biasing the body for low-power applications, however, does not reduce the SEE vulnerability compared with operation when the body grounded. The body-biasing voltage has no impact on SEE sensitivity for NMOS hits.

Keywords

CMOS digital integrated circuits; low-power electronics; radiation hardening (electronics); NMOS hits; PMOS hits; SEE; SET pulses; body-biasing circuits; body-biasing voltage; forward-biasing; low-power applications; nanoscale CMOS; reverse-bias; single-event effects sensitivity; Computational modeling; Integrated circuit modeling; MOSFET; MOSFET circuits; Semiconductor device modeling; Semiconductor process modeling; Solid modeling; Body-biasing; charge sharing effect; pulse quenching; single-event effects (SEEs);

fLanguage

English

Journal_Title

Device and Materials Reliability, IEEE Transactions on

Publisher

ieee

ISSN

1530-4388

Type

jour

DOI

10.1109/TDMR.2014.2308592

Filename

6748890