DocumentCode :
588078
Title :
An FPGA-accelerated testbed for hardware component development in MIMO wireless communication systems
Author :
Borlenghi, F. ; Auras, Dominik ; Witte, E.M. ; Kempf, Timo ; Ascheid, Gerd ; Leupers, Rainer ; Meyr, Heinrich
Author_Institution :
Inst. for Commun. Technol. & Embedded Syst., RWTH Aachen Univ., Aachen, Germany
fYear :
2012
fDate :
16-19 July 2012
Firstpage :
278
Lastpage :
285
Abstract :
FPGA-based prototyping is nowadays common practice in the functional verification of hardware components since it allows to cover a large number of test cases in a shorter time compared to HDL simulation. In addition, an FPGA-based emulator significantly accelerates the simulation with respect to bit-true software models. This speed-up is crucial when the statistical properties of a system have to be analyzed by Monte Carlo techniques. In this paper we consider a multiple-input multiple-output (MIMO) wireless communication system and show how integrating an FPGA accelerator in the software simulation framework is key to enable the development of complex hardware components in the receiver, from algorithm all the way to chip testing. In particular, we focus on a MIMO detector implementation based on the depth-first sphere decoding algorithm. The speed-up of up to 3 orders of magnitude achieved by hardware-accelerated simulation compared to a pure software testbed enables an extensive fixed-point exploration. Furthermore, it allows a unique characterization of the system communication performance and the MIMO detector run-time characteristics, which vary for different configuration parameters and operating scenarios and hence require a thorough investigation.
Keywords :
MIMO communication; Monte Carlo methods; digital simulation; field programmable gate arrays; hardware description languages; logic testing; radiocommunication; statistical analysis; telecommunication computing; FPGA accelerator; FPGA-accelerated testbed; FPGA-based emulator; FPGA-based prototyping; HDL simulation; MIMO detector implementation; MIMO detector run-time characteristics; MIMO wireless communication systems; Monte Carlo techniques; bit-true software models; chip testing; configuration parameters; depth-first sphere decoding algorithm; fixed-point exploration; functional verification; hardware component development; hardware components; hardware-accelerated simulation; multiple-input multiple-output wireless communication system; software simulation framework; software testbed; statistical property; system communication performance; Computational modeling; Data models; Field programmable gate arrays; Hardware; MIMO; Servers; Software;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Embedded Computer Systems (SAMOS), 2012 International Conference on
Conference_Location :
Samos
Print_ISBN :
978-1-4673-2295-9
Electronic_ISBN :
978-1-4673-2296-6
Type :
conf
DOI :
10.1109/SAMOS.2012.6404187
Filename :
6404187
Link To Document :
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