A track-and-hold amplifier for 1GSps 8bit ADC in 0.18 µm CMOS process

Author

Yi Zhang ; Qiao Meng ; Qing Huang ; Kai Tang

Author_Institution

Inst. of RF- & OE-ICs, Southeast Univ., Nanjing, China

fYear

2012

fDate

10-12 Oct. 2012

Firstpage

5

Lastpage

8

Abstract

A track-and-hold amplifier (THA) for 1GSps 8bit pipelined folding and interpolation (F&I) ADC is realized in TSMC 0.18 μm 1p6m CMOS process. The THA adopts bootstrapped switch instead of simple MOS switch. Dummy transistors and duplicated source follower are also taken to improve its performance. Post simulation results prove that the THA achieves a SNDR of 51.1dB at Nyquist sampling rate. Under a 1.8V supply, its power is 29mW. Simulation results of the F&I ADC demonstrate that the THA is suitable for the application.

Keywords

CMOS integrated circuits; amplifiers; analogue-digital conversion; switches; 1GSps 8bit ADC; CMOS process; F&I ADC; MOS switch; Nyquist sampling rate; TSMC 0.18 μm 1p6m CMOS process; bootstrapped switch; dummy transistor; pipelined folding; pipelined interpolation; power 29 mW; size 0.18 mum; source follower; track-and-hold amplifier; voltage 1.8 V; CMOS integrated circuits; CMOS process; Layout; Linearity; Simulation; Switches; Transistors; F&I ADC; THA; bootstrapped switch; buffer;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Technologies for Communications (ATC), 2012 International Conference on

Conference_Location

Hanoi

ISSN

2162-1020

Print_ISBN

978-1-4673-4351-0

Type

conf

DOI

10.1109/ATC.2012.6404217

Filename

6404217