One-chip multi-output SMPS using a shared digital controller and a pseudo relaxation oscillating technique

This paper suggests a multi-level and multi-output SMPS based on a shared digital logic controller through separately operating in exclusive time period. The number of output voltages and their levels can be programmably selected for multiple power voltages. The proposed SMPS also shows a novel DPWM generator based on Pseudo Relaxation Oscillating technique. Although the shared architecture can be devised with small area and high efficiency, it has critical drawbacks that real-time control of each DPWM generators are impossible and its output voltage can be unstable. To solve these problems, a real-time current compensation scheme is proposed as a solution. A current consumption of the core block and entire block with four driver buffers was simulated about 4.9mA and 30mA at 10MHz switching frequency and 100MHz core operating frequency. Output voltage ripple is 11 mV at 3.3V output voltage. Over/undershoot voltage was HmV/19mV at 3.3V output voltage. The noise performance was simulated at 800mA @100KHz load regulation. Core circuit can be implemented small size in 700 μm × 800 μm area. For the verification of proposed circuit, the simulations were carried out with Dong-bu Hitek BCD 0.35μm technology.