DocumentCode :
589472
Title :
Design and analysis of a power-efficient cascode-compensated amplifier
Author :
Ali, Shady ; Tanner, Steve ; Farine, Pierre-Andre
Author_Institution :
Swiss Fed. Inst. of Technol. (EPFL), Lausanne, Switzerland
fYear :
2012
fDate :
4-7 Nov. 2012
Firstpage :
96
Lastpage :
99
Abstract :
We present the design and analysis of a power-efficient cascode-compensated amplifier. The proposed analysis is based on an intuitive approach that simplifies the design of sucn structures. Based on this analysis, an amplifier in UMC 0.18 μm technology is designed. Cascode compensation, along with other power saving techniques, results in a power efficient amplifier with a relatively high figure of merit (1927 MHz·pF/mW) compared with other state of the art realizations.
Keywords :
analogue circuits; power amplifiers; UMC; cascode compensation; power saving techniques; power-efficient cascode-compensated amplifier; size 0.18 mum; Capacitance; Capacitors; Impedance; Operational amplifiers; Transconductance; Transistors; Cascode compensated Amplifier; Power Efficiency;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SoC Design Conference (ISOCC), 2012 International
Conference_Location :
Jeju Island
Print_ISBN :
978-1-4673-2989-7
Electronic_ISBN :
978-1-4673-2988-0
Type :
conf
DOI :
10.1109/ISOCC.2012.6407048
Filename :
6407048
Link To Document :
بازگشت