A third generation many-core processor for secure embedded computing systems

Author

Irza, J. ; Doerr, M. ; Solka, M.

Author_Institution

Coherent Logix, Inc., Andover, MA, USA

fYear

2012

fDate

10-12 Sept. 2012

Firstpage

1

Lastpage

3

Abstract

As compute-intensive products proliferate, there is an ever growing need to provide security features to detect tampering, identify cloned or counterfeit hardware, and deter cybersecurity threats. This paper describes the security features of the third generation 100-core HyperX™ processor which addresses these needs. Programmable security barriers allow the processor to implement a red-black System on Chip solution. The implementation of Physically Unclonable Functions (PUFs), encryption/decryption engines, a secure boot controller, and anti-tamper features enable the engineer to realize a secure embedded computing solution in an ultra-low power, many-core, C programmable processor-memory network.

Keywords

C language; cryptography; embedded systems; multiprocessing systems; system-on-chip; C programmable processor-memory network; HyperX processor; PUF; antitamper features; cloned identification; compute-intensive products; cybersecurity threat detection; embedded computing system security; encryption-decryption engines; hardware counterfeiting; physically unclonable functions; programmable security barriers; red-black system on chip solution; secure boot controller; tampering detection; third generation many-core processor; Embedded computing; Encryption; Hardware; Random access memory; System-on-a-chip; AES; C-programmable; GCM; HyperX; PUF; anti-tamper; encryption; many-core; red-black; ultra-low power;

fLanguage

English

Publisher

ieee

Conference_Titel

High Performance Extreme Computing (HPEC), 2012 IEEE Conference on

Conference_Location

Waltham, MA

Print_ISBN

978-1-4673-1577-7

Type

conf

DOI

10.1109/HPEC.2012.6408657

Filename

6408657