Nano-size structure formation on Si substrate for optical device application

We have found optimized RIE conditions by increasing the distance between the metal mesh and silicon wafer. We have also found that by increasing the reactive ion etching (RIE) process time with an optimized SF₆/O₂ ratio, pressure, and RF power. It is possible to switch from a random texture to an nm-size pyramid texture on μm-size pyramid texture. This RIE system textured a crystalline wafer surface that formed approximately 10~20 nm structures on 2~3 μm pyramidal silicon with less than 3% of reflectivity.