DocumentCode :
590722
Title :
Design and analysis of a many-core processor architecture for multimedia applications
Author :
Jyu-Yuan Lai ; Po-Yu Chen ; Ting-Shuo Hsu ; Chih-Tsun Huang ; Jing-Jia Liou
Author_Institution :
Dept. of Comput. Sci., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear :
2012
fDate :
3-6 Dec. 2012
Firstpage :
1
Lastpage :
6
Abstract :
We present a design of many-core processor architecture with superior cost-effectiveness to fulfill the rapid increasing demand of high-speed embedded multimedia applications. The prototype platform consists of sixteen processor cores and a 4-by-4 mesh-based duplex network interconnection with external memory. The hardware and software interface in a bare-metal environment, i.e., without an Operating System (OS), has been emphasized in our architecture. An on-chip communication library is developed for practical parallel applications. In addition, we propose two memory-based file handling approaches to manipulate files with the lack of file-system support by OS. Our file handling approach can effectively reduce the minimum requirement of local memory without page swapping for each core from 4 MB to 64 KB in a case study of JPEG encoding. Furthermore, the analysis of instruction and data caches is addressed for the trade-off between area and speed. The experimental result indicates that our many-core platform with its application development infrastructure is efficient in delivering cost-effective multimedia applications in a bare-metal environment.
Keywords :
cache storage; embedded systems; multimedia communication; multiprocessing systems; multiprocessor interconnection networks; 4-by-4 mesh-based duplex network interconnection; JPEG encoding; OS; bare-metal environment; data cache; file manipulation; hardware interface; high-speed embedded multimedia application; instruction analysis; many-core processor architecture; memory size 4 MByte to 64 KByte; memory-based file handling approaches; on-chip communication library; operating system; software interface; Encoding; Memory management; Microprocessors; Multimedia communication; Prototypes; Transform coding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal & Information Processing Association Annual Summit and Conference (APSIPA ASC), 2012 Asia-Pacific
Conference_Location :
Hollywood, CA
Print_ISBN :
978-1-4673-4863-8
Type :
conf
Filename :
6411869
Link To Document :
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