Analytical study of the effect of asymmetric gate bias on the performance of double gate TFET

Author

Gupta, Puneet ; Das, Joydeep ; Burman, D. ; Brahma, Madhuchhanda ; Rahaman, Hafizur ; Dasgupta, Parthasarathi

Author_Institution

Bengal Eng. & Sci. Univ., Shibpur, India

fYear

2012

fDate

28-29 Dec. 2012

Firstpage

145

Lastpage

148

Abstract

In this paper we have investigated the effect of asymmetric gate bias on the performance of a double gated TFET structure. We have carried out an extensive simulation study on a recently reported novel electron hole bilayer TFET structure. The structure exhibits a high on current in the range of 50 μA/μm and the off current remains as low as 10^-15 Ampere/μm. So a I_on/I_off ratio of 10P¹⁰ can be achieved. Subthreshold swing has also been reduced to a value of 18mV/decade. The device principle and performance are investigated by 2D numerical simulation.

Keywords

field effect transistors; numerical analysis; tunnel transistors; 2D numerical simulation; asymmetric gate bias; double gate TFET; electron hole bilayer; subthreshold swing; tunnel FET; Decision support systems; Dielectrics; Educational institutions; Electron devices; Intelligent systems; Presses; Silicon on insulator technology; EHBTFET; TFET; subthreshold swing; transfer characteristics;

fLanguage

English

Publisher

ieee

Conference_Titel

Communications, Devices and Intelligent Systems (CODIS), 2012 International Conference on

Conference_Location

Kolkata

Print_ISBN

978-1-4673-4699-3

Type

conf

DOI

10.1109/CODIS.2012.6422157

Filename

6422157