DocumentCode :
591437
Title :
Performance analysis and simulation study of a Sandwiched Barrier Tunnel FET
Author :
Gupta, Partha Sarathi ; Brahma, Madhuchhanda ; Das, Joydeep ; Burman, D. ; Rahaman, Hafizur ; Dasgupta, P.S.
Author_Institution :
Bengal Eng. & Sci. Univ., Howrah, India
fYear :
2012
fDate :
28-29 Dec. 2012
Firstpage :
437
Lastpage :
440
Abstract :
The Sandwiched Barrier Tunnel FET is a promising device for low power applications. It shows a steep subthreshold slope and a CMOS compatible high ON-STATE current, (Ion). In this paper we present a simulation study to investigate the dependence of key device metrics on various structural parameters. We also present a simple model for the subthreshold current assuming an extreme retrograde doping profile. The assumption made, is justified through simulation results.
Keywords :
circuit simulation; field effect transistors; low-power electronics; tunnel transistors; CMOS compatible high on-state current; circuit simulation study; extreme retrograde doping profile; low power applications; sandwiched barrier tunnel FET; steep subthreshold slope; Charge carrier processes; Decision support systems; Intelligent systems; Tunneling; Band to Band Tunneling; Low Power; Subthreshold Swing; TCAD; TFET;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Devices and Intelligent Systems (CODIS), 2012 International Conference on
Conference_Location :
Kolkata
Print_ISBN :
978-1-4673-4699-3
Type :
conf
DOI :
10.1109/CODIS.2012.6422232
Filename :
6422232
Link To Document :
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