Title :
Research on Real-time Implementation of Spaceborn Viterbi Decoder
Author :
Yongqing Wang ; Donglei Liu ; Shan Zhou ; Yan Chen ; Zhihong Ma ; Siliang Wu
Author_Institution :
Sch. of Message & Electron., Beijing Inst. of Technol., Beijing, China
Abstract :
In order to meet requirements of BER of satellite-to-ground and satellite-to-satellite communication in space TT&C communication system, this paper investigates the FPGA real-time implementation technology of space-borne Viterbi decoder algorithm. A novel method based on dual-port RAM is proposed as the survivor path management solution. Besides, a series of methods, such as path-cutting, parallelized Adding-Comparison-Selection computing and soft-decision, are adopted to further improve the performance of Viterbi decoding. Compared to the conventional decoder, the Viterbi decoder based on XC2V6000-4 FPGA has advantages of short delay, good real-time performance and low hardware complexity with the speed of maximum output data rate to 116Mbps.
Keywords :
Viterbi decoding; field programmable gate arrays; random-access storage; satellite ground stations; spaceborne radar; BER; FPGA real-time implementation technology; TT&C communication system; XC2V6000-4 FPGA; byte rate 116 MByte/s; dual-port RAM; hardware complexity; parallelized adding-comparison-selection computing; path-cutting; real-time implementation; satellite-to-ground communication; satellite-to-satellite communication; soft-decision; space-borne Viterbi decoder algorithm; survivor path management solution; Decoding; Field programmable gate arrays; Hardware; Random access memory; Real-time systems; Registers; Viterbi algorithm; FPGA; Viterbi Decoder; survivor-path management;
Conference_Titel :
Instrumentation, Measurement, Computer, Communication and Control (IMCCC), 2012 Second International Conference on
Conference_Location :
Harbin
Print_ISBN :
978-1-4673-5034-1
DOI :
10.1109/IMCCC.2012.388
