DocumentCode :
593220
Title :
Modelling, implementation and testing of an effective fault tolerant multiprocessor real-time system
Author :
Anand, A. ; Rajendra, Y. ; Narayanan, Shrikanth ; Radhamani, P.V.
Author_Institution :
CSE Dept., Amrita Vishwa Vidyapeetham, Coimbatore, India
fYear :
2012
fDate :
6-8 Dec. 2012
Firstpage :
107
Lastpage :
113
Abstract :
Massively redundant hardware as the traditional means for fault tolerance in multiprocessor safety-critical systems especially for aerospace applications can be exorbitant and not very favorable for its weight, size and power requirements. Here, we propose an effective fault tolerant real-time multiprocessor system model with the same level of redundancy as that of a traditional system but can handle additional workload at no extra cost. This paper gives the design of an effective fault tolerant real-time system model and the design of a generic simulator FaRReTSim, which has been used to perform extensive simulation studies for the model. The performance of the real-time system model has been evaluated under fault free and fault conditions using FaRReTSim.
Keywords :
fault tolerance; multiprocessing systems; real-time systems; safety-critical software; fault tolerant multiprocessor; generic simulator FaRReTSim; massively redundant hardware; multiprocessor safety-critical system; real-time system; Program processors; Fault tolerance; Multiprocessor; Periodic and Aperiodic tasks Resource Management; Real-Time Scheduling; Safety-critical;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel Distributed and Grid Computing (PDGC), 2012 2nd IEEE International Conference on
Conference_Location :
Solan
Print_ISBN :
978-1-4673-2922-4
Type :
conf
DOI :
10.1109/PDGC.2012.6449800
Filename :
6449800
Link To Document :
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