Title :
High-Performance Silicon Nanotube Tunneling FET for Ultralow-Power Logic Applications
Author :
Fahad, Hossain M. ; Hussain, M.M.
Author_Institution :
Integrated Nanotechnol. Lab., King Abdullah Univ. of Sci. & Technol., Thuwal, Saudi Arabia
Abstract :
To increase typically low output drive currents from tunnel field-effect transistors (FETs), we show a silicon vertical nanotube (NT) architecture-based FET´s effectiveness. Using core (inner) and shell (outer) gate stacks, the silicon NT tunneling FET shows a sub-60 mV/dec subthreshold slope, ultralow off -state leakage current, higher drive current compared with gate-all-around nanowire silicon tunnel FETs.
Keywords :
elemental semiconductors; field effect transistors; nanotube devices; silicon; tunnel transistors; Si; core-shell gate stacks; gate-all-around nanowire silicon tunnel FET; high-performance silicon nanotube tunneling FET; low-output drive currents; silicon NT tunneling FET; subthreshold slope; tunnel field effect transistors; ultralow-off-state leakage current; ultralow-power logic application; FETs; Leakage current; Logic gates; Performance evaluation; Silicon; Tunneling; BTBT; high performance; nanotube (NT); silicon;
Journal_Title :
Electron Devices, IEEE Transactions on
DOI :
10.1109/TED.2013.2243151
