• DocumentCode
    594012
  • Title

    Toward a graphical tool for image and video processing embedded systems design

  • Author

    Zhar, N. ; Ali, M.A. ; Eleuldj, Mohsine

  • Author_Institution
    Lab. Syst. d´´Inf. et Repartition, Ecole Mohammadia d´´Ing., Rabat, Morocco
  • fYear
    2012
  • fDate
    18-20 Sept. 2012
  • Firstpage
    158
  • Lastpage
    163
  • Abstract
    In this paper we identify the requirements of a design tool for the implementation of image and video processing algorithms in hardware platforms such as FPGA or ASIC. We discuss the advantages and weaknesses of some existing design languages. Finally, we propose our solution, in compliance with specified requirements, which intends to bypass the shortcomings of existing languages by providing a high-level of abstraction through two kinds of diagrams; structural diagram and filter edition diagram. It also allows a formal verification and automatic code generation for an ASIC or a FPGA implementation.
  • Keywords
    application specific integrated circuits; embedded systems; field programmable gate arrays; formal verification; program compilers; video signal processing; ASIC; FPGA; automatic code generation; filter edition diagram; formal verification; graphical tool; image processing embedded systems design; structural diagram; video processing embedded systems design; Algorithm design and analysis; Computational modeling; Hardware; Image processing; Real-time systems; Streaming media; Unified modeling language; design; embedded system; image processing; real-time;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Innovative Computing Technology (INTECH), 2012 Second International Conference on
  • Conference_Location
    Casablanca
  • Print_ISBN
    978-1-4673-2678-0
  • Type

    conf

  • DOI
    10.1109/INTECH.2012.6457762
  • Filename
    6457762