DocumentCode
594287
Title
Failure mode and effects analysis (FMEA) and model-checking of software for embedded systems by sequential scheduling of vectors of logic-labelled finite-state machines
Author
Estivill-Castro, Vladimir ; Hexel, Rene ; Rosenblueth, D.A.
Author_Institution
Griffith Univ., Brisbane, QLD, Australia
fYear
2012
fDate
15-18 Oct. 2012
Firstpage
1
Lastpage
6
Abstract
Model-Driven Development (MDD) has proven to be a very powerful tool to produce software for embedded systems that control sophisticated equipment. It is therefore even more critical that such software be verified to be correct and to clearly understand what the safety implications of potential failures in sensors, actuators or faults of the software itself are. Using vectors of logic-labelled finite state machines, a clear semantics is obtained as well as executable models that provide the benefits that MDD promises. Since we can perform effective model-checking on these models, we show in this paper that we can use this to systematize and automate the failure mode and effect analysis of systems with embedded software. We illustrate this with two ubiquitous examples in the literature of model-checking for software in embedded systems.
Keywords
embedded systems; failure analysis; finite state machines; formal verification; scheduling; software fault tolerance; vectors; MDD; embedded software; embedded systems; executable models; failure mode and effect analysis; logic-labelled finite state machines; model-driven development; sequential scheduling; software model checking; software verification; sophisticated equipment control; vectors; Hazard identification; Risk assessment; Safety and systems engineering; Safety cases; Software safety;
fLanguage
English
Publisher
iet
Conference_Titel
System Safety, incorporating the Cyber Security Conference 2012, 7th IET International Conference on
Conference_Location
Edinburgh
Electronic_ISBN
978-1-84919-678-9
Type
conf
DOI
10.1049/cp.2012.1510
Filename
6458951
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