DocumentCode :
59577
Title :
A Two-Stage Decoding Algorithm to Lower the Error-Floors for LDPC Codes
Author :
Xueting Zhang ; Shaoping Chen
Author_Institution :
Hubei Key Lab. of Intell. Wireless Commun., South-Central Univ. for Nat., Wuhan, China
Volume :
19
Issue :
4
fYear :
2015
fDate :
Apr-15
Firstpage :
517
Lastpage :
520
Abstract :
A two-stage decoding algorithm to lower the error-floor for low-density parity-check (LDPC) codes is presented. An efficient stopping criterion is proposed to avoid unnecessary iterations in the first stage. If the stopping criterion is reached, the first stage decoding will be terminated and the second stage decoding will be started, where the unsuccessfully decoded words are re-decoded by manipulating the log-likelihood ratio (LLR) of two types of specifically selected variable nodes. Simulation results show that the proposed algorithm can effectively lower the error floor of LDPC codes while maintaining a low decoding complexity.
Keywords :
decoding; error analysis; parity check codes; LDPC code; LLR; decoding complexity; error-floor; log-likelihood ratio; low-density parity-check code; stopping criterion; two-stage decoding algorithm; Bit error rate; Charge carrier processes; Complexity theory; Convergence; Decoding; Iterative decoding; LDPC codes; error floor; post processing; two-stage decoding;
fLanguage :
English
Journal_Title :
Communications Letters, IEEE
Publisher :
ieee
ISSN :
1089-7798
Type :
jour
DOI :
10.1109/LCOMM.2015.2401554
Filename :
7036084
Link To Document :
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