DocumentCode :
596086
Title :
Verification with small and short worlds
Author :
Sinha, Roopak ; Sturton, Cynthia ; Maniatis, Petros ; Seshia, Sanjit A. ; Wagner, Dietmar
fYear :
2012
fDate :
22-25 Oct. 2012
Firstpage :
68
Lastpage :
77
Abstract :
We consider the verification of safety properties in systems with large arrays and data structures. Such systems are common at the low levels of software stacks; examples are hypervisors and CPU emulators. The very large data structures in such systems (e.g., address-translation tables and other caches) make automated verification based on straightforward statespace exploration infeasible. We present S2W, a new abstraction-based model-checking methodology to facilitate automated verification of such systems. As a first step, inductive invariant checking is performed. If that fails, we compute an abstraction of the original system by precisely modeling only a subset of state variables while allowing the rest of the state to evolve arbitrarily at each step. This subset of the state constitutes a “small world” hypothesis, and is extracted from the property. Finally, we verify the safety property on the abstract model using bounded model checking. We ensure the verification is sound by first computing a bound on the reachability diameter of the abstract model. For this computation, we developed a set of heuristics that we term the “short world” approach. We present several case studies, including verification of the address translation logic in the Bochs x86 emulator, and verification of security properties of several hypervisor models.
Keywords :
data structures; program verification; public domain software; reachability analysis; safety-critical software; security of data; Bochs x86 emulator; abstraction-based model checking methodology; address translation logic; automated verification; bounded model checking; hypervisor models; inductive invariant checking; reachability diameter; safety property; security properties; short world approach; software stacks; straightforward state-space exploration; very large data structures; Abstracts; Computational modeling; Data structures; Design automation; Safety; Vectors; Virtual machine monitors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Formal Methods in Computer-Aided Design (FMCAD), 2012
Conference_Location :
Cambridge
Print_ISBN :
978-1-4673-4832-4
Type :
conf
Filename :
6462557
Link To Document :
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