DocumentCode
596089
Title
Symbolically synthesizing small circuits
Author
Ehlers, Rudiger ; Kunighofer, R. ; Hofferek, Georg
Author_Institution
Reactive Syst. Group, Saarland Univ., Saarbrucken, Germany
fYear
2012
fDate
22-25 Oct. 2012
Firstpage
91
Lastpage
100
Abstract
Reactive synthesis, where a finite-state system is automatically generated from its specification, is a particularly ambitious way to engineer correct-by-construction systems. In this paper, we propose implementation-extraction based on computational learning of Boolean functions as a final synthesis step in order to obtain small and fast circuits for realizable specifications in a symbolic way. Our starting point is a restriction of the system player´s choices in a synthesis game such that all remaining strategies are winning. Such games are used in most symbolic synthesis tools, and hence, our technique is not tied to one specific synthesis workflow, but rather supports a large variety of these. We present several variants of our implementation-learning approach, including one based on Bshouty´s monotone theory. The key idea is the efficient use of the system player´s freedom in the game. Our experimental results show a significant reduction of implementation size compared to previous methods, while maintaining reasonable computation times.
Keywords
Boolean functions; electronic engineering computing; finite state machines; learning (artificial intelligence); Boolean functions; Bshouty monotone theory; computational learning; correct-by-construction systems; finite-state system; implementation-extraction; reactive synthesis; symbolic synthesis tools; symbolically synthesizing small circuits; synthesis workflow; Boolean functions; Cost accounting; Data structures; Games; Input variables; Learning systems; Logic gates;
fLanguage
English
Publisher
ieee
Conference_Titel
Formal Methods in Computer-Aided Design (FMCAD), 2012
Conference_Location
Cambridge
Print_ISBN
978-1-4673-4832-4
Type
conf
Filename
6462560
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