Title :
Full custom datapath of 16-bit CORDIC
Author :
Zhuo Bi ; Yijun Dai
Author_Institution :
Sch. of Mechatron. Eng. & Autom., Shanghai Univ., Shanghai, China
Abstract :
A radix-2 16 bits CORDIC (CoOrdinate Rotation DIgital Computer) architecture which includes pipelined and parallelism is presented in this paper. A full custom technology for CORDIC datapath which is used in the proposed architecture for 16-bit precision can improve the throughout and decrease the area. As a result, the silicon area of the data-path is 11699.877μm2 in the 45nm CMOS technology library and the critical path delay is 875ps at the SS (Slow-Slow) corners whose Voltage and Temperature are 1.1V and 75° respectively. Based on the layout level, the simulation results show that the design has characteristics of high speed and small area in full custom technology.
Keywords :
CMOS integrated circuits; integrated circuit layout; parallel architectures; pipeline arithmetic; CMOS technology library; CORDIC datapath; coordinate rotation digital computer architecture; critical path delay; custom datapath; custom technology; layout level; parallel architecture; pipeline architecture; radix-2 CORDIC; silicon area; slow-slow corners; Adders; Computer architecture; Delay; Latches; Layout; Pipelines; Registers;
Conference_Titel :
Advanced Computational Intelligence (ICACI), 2012 IEEE Fifth International Conference on
Conference_Location :
Nanjing
Print_ISBN :
978-1-4673-1743-6
DOI :
10.1109/ICACI.2012.6463320
