Title :
Conflict free, parallel memory access for radix-2 FFT processors
Author :
Polychronakis, N. ; Reisis, Dionysios ; Tsilis, E. ; Zokas, I.
Author_Institution :
Phys. Dept., Nat. & Kapodistrian Univ. of Athens, Athens, Greece
Abstract :
The current paper presents a parallel addressing technique for radix-2 FFT architectures. The novel technique bases on a permutation to accomplish parallel load and store of the FFT data even with a single memory bank, which stores two FFT elements at each address. Furthermore, the proposed addressing scheme minimizes the requirements for the address generation and processor control circuits. An example FPGA implementation shows the simplicity of the architecture and validates the results.
Keywords :
digital arithmetic; fast Fourier transforms; field programmable gate arrays; parallel architectures; parallel memories; FFT data storage; FFT elements; FPGA implementation; conflict free; parallel addressing technique; parallel load; parallel memory access; processor control circuits; radix-2 FFT processors; single memory bank; Circuits and systems; Computer architecture; Indexes; Multiplexing; Program processors; Radiation detectors; Registers;
Conference_Titel :
Electronics, Circuits and Systems (ICECS), 2012 19th IEEE International Conference on
Conference_Location :
Seville
Print_ISBN :
978-1-4673-1261-5
Electronic_ISBN :
978-1-4673-1259-2
DOI :
10.1109/ICECS.2012.6463527
