All-digital A/D converter TAD for high-resolution and low-power sensor/RF interface

For achieving both high resolution and low power of a sensor/RF interface, time-domain processing using entirely full-digital circuits, which deal with only two voltage levels (i.e., V_in-supply-voltage and ground-level), is presented. In a much broader sense, digital circuits can be used for time-domain processing instead of conventional analog signal processing. In this study, an all-digital 6- to 16-bit adaptive sensor-interface ADC is experimentally evaluated for high-resolution and low-power operation. The circuit architecture is completely digital, using a ring-delay-line RDL driven by an input voltage V_in as its power supply. Resolutions can be controlled by setting its conversion time T_cv, resulting in 16bit (1kS/s, 34μW) and 6bit (1MS/s, 48μW) with a prototype IC in a low-cost 0.65μm digital CMOS. As a scaling result based on the all-digital structure, higher performance of 0.18μm-test-IC with 28μV/LSB (160-kS/s) has been confirmed. Finally, as an RF digitization application, performance of time-domain processing as a mixer and ADC has been demonstrated achieving an FOM of ~35fJ/conversion-step with high resolution and low power for a 0.18μm one-chip radio-controlled clock (RCC) receiver IC.