Title :
Dynamically reconfigurable DCT architectures based on bitrate, power, and image quality considerations
Author :
Yuebing Jiang ; Pattichis, Marios
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of New Mexico, Albuquerque, NM, USA
fDate :
Sept. 30 2012-Oct. 3 2012
Abstract :
We propose a dynamically reconfigurable DCT architecture system that can be used to optimize performance objectives while meeting real-time constraints on power, image quality, and bitrate. The proposed system can be dynamically reconfigured between 4 different modes: (i) minimum power mode, (ii) minimum bitrate mode, (iii) maximum image quality mode, and (iv) typical mode. The proposed system relies on the use of efficient DCT implementations that are parameterized by the word-length of the DCT transform coefficients and the use of different quantization quality factors. Optimal DCT architectures and quality factors are pre-computed on a training dataset. The proposed system is validated on the LIVE database using leave-one-out. From the results, it is clear that real-time constraints can be successfully met for the majority of the test images while optimizing for the 4 modes of operation.
Keywords :
constraint handling; discrete cosine transforms; image processing; DCT transform coefficients; bitrate considerations; dynamically reconfigurable DCT architectures; image quality considerations; maximum image quality mode; minimum bitrate mode; minimum power mode; power considerations; real-time constraints; test images; typical mode; Bit rate; Computer architecture; Databases; Discrete cosine transforms; Hardware; Image quality; Q factor; DCT; Dynamic Partial Reconfiguration; finite word length; quantization;
Conference_Titel :
Image Processing (ICIP), 2012 19th IEEE International Conference on
Conference_Location :
Orlando, FL
Print_ISBN :
978-1-4673-2534-9
Electronic_ISBN :
1522-4880
DOI :
10.1109/ICIP.2012.6467397