Modeling of degradation caused by channel hot carrier and negative bias temperature instability effects in p-MOSFETs

Author

Ma, Chengbin ; Mattausch, Hans Jurgen ; Miyake, M. ; Iizuka, Tetsuya ; Matsuzawa, K. ; Yamaguchi, Satarou ; Hoshida, Takeshi ; Kinoshita, Akira ; Arakawa, Takeshi ; He, Jinwei ; Miura-Mattausch, M.

Author_Institution

Grad. Sch. of Adv. Sci. of Matter, Hiroshima Univ., Higashi-Hiroshima, Japan

fYear

2012

fDate

Oct. 29 2012-Nov. 1 2012

Firstpage

1

Lastpage

3

Abstract

Modeling of channel hot carrier and negative bias temperature instability effects in p-MOSFETs is developed in this work. By calculating the vertical gate oxide field as well as the maximum lateral channel field, the non-monotonic threshold voltage degradation is accurately predicted. This model shows good agreements with measured data under various gate lengths, the stress biases, as well as time duration conditions.

Keywords

MOSFET; hot carriers; channel hot carrier; degradation modeling; maximum lateral channel field; negative bias temperature instability effects; non-monotonic threshold voltage degradation; p-MOSFET; stress biases; time duration conditions; various gate lengths; vertical gate oxide field; Charge carrier processes; Data models; Degradation; Hot carriers; Logic gates; MOSFET circuits; Stress;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4673-2474-8

Type

conf

DOI

10.1109/ICSICT.2012.6467619

Filename

6467619