Title :
A shuffle frog-leaping algorithm for test scheduling of 2D/3D SoC
Author :
Xiao Le Cui ; Xin Ming Shi ; Hong Li ; Chung Len Lee
Author_Institution :
Shenzhen Grad. Sch., Key Lab. of Integrated Microsyst., Peking Univ., Shenzhen, China
fDate :
Oct. 29 2012-Nov. 1 2012
Abstract :
Test scheduling is an important issue for testing the SoC. This work proposes a modified shuffle frog-leaping algorithm for test scheduling to reduce the test application time under the peak power constraint. It is applied to the 2D as well as the 3D SoC and experimental results on benchmark circuits show that it is one of the most effective algorithms in solving the problem.
Keywords :
logic testing; system-on-chip; three-dimensional integrated circuits; 2D/3D SoC; SoC testing; peak power constraint; shuffle frog-leaping algorithm; system-on-chip; test application time; test scheduling; Benchmark testing; Optimization; Scheduling; Sociology; Statistics; System-on-a-chip; SoC testing; shuffled frog leaping algorithm; test scheduling;
Conference_Titel :
Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on
Conference_Location :
Xi´an
Print_ISBN :
978-1-4673-2474-8
DOI :
10.1109/ICSICT.2012.6467632
