A 36nV/√Hz noise PSD chopper-stabilized CMOS amplifier with a new ripple-spur-filter scheme

Author

Peng Sun ; Menglian Zhao ; Xiaobo Wu

Author_Institution

Inst. of VLSI Design, Zhejiang Univ., Hangzhou, China

fYear

2012

fDate

Oct. 29 2012-Nov. 1 2012

Firstpage

1

Lastpage

3

Abstract

A low-noise, low-power CMOS amplifier is developed using the chopper-stabilized technique. A new filter scheme is employed to suppress chopping ripple and spur. It composes of a band-pass amplifier, a novel low-pass-chopper (LPC) and a low-pass class-AB output stage. With the LPC, the amplifier rejects unexpected high frequency signal by about extra -12dB, which shares burden of the band-pass amplifier. The proposed amplifier is simulated in TSMC 0.35-μm CMOS process and a noise PSD of 36nV/√Hz and a unity gain bandwidth of 1MHz with an overall current consumption of 14.5μA are achieved.

Keywords

CMOS analogue integrated circuits; band-pass filters; circuit stability; integrated circuit noise; low noise amplifiers; low-pass filters; low-power electronics; LPC; TSMC CMOS process; band-pass amplifier; bandwidth 1 MHz; chopper-stabilized CMOS amplifier; chopping ripple suppression; chopping spur suppression; current 14.5 muA; high frequency signal; low-noise low-power CMOS amplifier; low-pass class-AB output stage; low-pass-chopper; noise PSD; ripple-spur-filter scheme; size 0.35 mum; Band pass filters; CMOS integrated circuits; Choppers (circuits); Low pass filters; Low-frequency noise; Topology;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid-State and Integrated Circuit Technology (ICSICT), 2012 IEEE 11th International Conference on

Conference_Location

Xi´an

Print_ISBN

978-1-4673-2474-8

Type

conf

DOI

10.1109/ICSICT.2012.6467728

Filename

6467728